• DocumentCode
    3544694
  • Title

    Efficient computation of dominators in multiple-output circuit graphs

  • Author

    Krenz, René

  • Author_Institution
    R. Inst. of Technol., IMIT-KTH, Stockholm, Sweden
  • fYear
    2005
  • fDate
    23-26 May 2005
  • Firstpage
    2223
  • Abstract
    We present an efficient technique for computing dominators in multiple-output circuit graphs. Dominators provide information about the origin and the end of reconverging paths in a graph. This information is widely used in CAD applications such as satisfiability checking, equivalence checking, ATPG, technology mapping, decomposition of Boolean functions and power optimization. Experiments on a large set of benchmarks show a significant performance improvement of our new technique in comparison to the well-known algorithm, presented by T. Lengauer and R.E. Tarjan (1979), for computing dominators in flowgraphs. We demonstrate that, in contrast to previous techniques, our algorithm obtains performance improvements especially for large benchmarks.
  • Keywords
    circuit layout CAD; flow graphs; Boolean function decomposition; CAD applications; benchmarks; efficient dominator computation; electronic design automation algorithms; equivalence checking; flowgraphs; multiple-output circuit graphs; power optimization; reconverging paths; satisfiability checking; technology mapping; Application software; Automatic test pattern generation; Boolean functions; Circuits; Design automation; Electronic design automation and methodology; Information analysis; Joining processes; Motion analysis; Space technology;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Circuits and Systems, 2005. ISCAS 2005. IEEE International Symposium on
  • Print_ISBN
    0-7803-8834-8
  • Type

    conf

  • DOI
    10.1109/ISCAS.2005.1465064
  • Filename
    1465064