Highly endurable floating body cell memory: Vertical biristor

A BJT named `biristor´, a term derived from `bi-stable resistor´, is demonstrated for 4F² high speed volatile memory applications. For a floating body cell, a gate-less vertical silicon pillar, which is an n-p-n BJT with an open-base, is employed, whereas for its control device, a MOSFET composed of a vertical silicon pillar surrounded by a gate is utilized. A 4F² memory cell array is realized by the unidirectional operation of a vertical two-terminal biristor, which consists of a cross-bar array. Due to the nature of the gate-less structure, the biristor cell shows excellent endurance of up to 10¹⁶.