Parallel algorithm for hardware implementation of inverse halftoning

Author

Siddiqi, Umair F. ; Sait, Sadiq M. ; Farooqui, Aamir A.

Author_Institution

Dept. of Comput. Eng., King Fahd Univ. of Pet. & Miner., Dhahran, Saudi Arabia

fYear

2005

fDate

23-26 May 2005

Firstpage

2377

Abstract

A parallel algorithm and its hardware implementation are proposed for an inverse halftone operation. The algorithm is based on lookup tables from which the inverse halftone value of a pixel is directly determined using a pattern of pixels. A method has been developed that allows accessing more than one value from the lookup table at any time. The lookup table is divided into smaller lookup tables, such that each pattern selected at any time goes to a separate smaller lookup table. The 15-pixel parallel version of the algorithm was tested on sample images and a simple and effective method has been used to overcome quality degradation due to pixel loss in the proposed algorithm. It can provide at least 4 times decrease in lookup table size when compared with a serial lookup table method implemented multiple times for the same number of pixels.

Keywords

field programmable gate arrays; image reconstruction; parallel algorithms; parallel processing; table lookup; FPGA implementation; inverse halftoning; lookup tables; parallel algorithm; pixel loss; quality degradation; reconstruction; Concurrent computing; Degradation; Hardware; Image processing; Minerals; Parallel algorithms; Petroleum; Pixel; Table lookup; Testing;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuits and Systems, 2005. ISCAS 2005. IEEE International Symposium on

Print_ISBN

0-7803-8834-8

Type

conf

DOI

10.1109/ISCAS.2005.1465103

Filename

1465103