DocumentCode :
3544983
Title :
A new real time edge linking algorithm and its VLSI implementation
Author :
Hajjar, A. ; Chen, T.
Author_Institution :
Dept. of Electr. Eng., Colorado State Univ., Fort Collins, CO, USA
fYear :
1997
fDate :
20-22 Oct 1997
Firstpage :
280
Lastpage :
284
Abstract :
Edges produced by existing edge detection algorithms often contain discontinuities. Edge linking as a post-processing step is an important step for computer vision and pattern recognition. We present a real-time algorithm and its VLSI implementation for linking broken edges. First, all broken edge points inside a 12×12 moving window are identified. The 12×12 window scans the input gray level edge map converting it into three levels of intensities using two threshold values. Decisions of linking the stronger edge break points are made based on their directions and/or with the guidance of the weak edge lines. The proposed VLSI architecture is capable of running the proposed edge linking algorithm in real-time outputting one pixel of the linking edge map per clock cycle with a latency of 11n+12 clock cycles, where n is the number of pixel columns in the image
Keywords :
VLSI; edge detection; parallel architectures; real-time systems; VLSI architecture; VLSI implementation; computer vision; edge detection; edge linking algorithm; pattern recognition; post-processing step; real-time; real-time algorithm; Clocks; Delay; Humans; Image edge detection; Joining processes; Object recognition; Pattern recognition; Pixel; Statistics; Very large scale integration;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Computer Architecture for Machine Perception, 1997. CAMP 97. Proceedings. 1997 Fourth IEEE International Workshop on
Conference_Location :
Cambridge, MA
Print_ISBN :
0-8186-7987-5
Type :
conf
DOI :
10.1109/CAMP.1997.632055
Filename :
632055
Link To Document :
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