Title :
Boundary scan access of built-in self-test for field programmable gate arrays
Author :
Gibson, Gretchen ; Gray, Lisa ; Stroud, Charles
Author_Institution :
Dept. of Electr. Eng., Kentucky Univ., Lexington, KY, USA
Abstract :
We discuss issues associated with system level access of Built-In Self-Test (BIST) for Field Programmable Gate Arrays (FPGAs) via the Boundary Scan Interface. In addition, we describe the design of an Application Specific Integrated Circuit (ASIC) which serves as an interface between a PC parallel port and the Test Access Port (TAP) of one or more FPGAs to reprogram the FPGA(s) and administer BIST during off-line testing. We also include a brief description of the FPGA BIST architecture and operation
Keywords :
application specific integrated circuits; automatic testing; boundary scan testing; built-in self test; field programmable gate arrays; logic testing; FPGA BIST architecture; PC parallel port; boundary scan access; built-in self-test; field programmable gate arrays; interface ASIC; system level access; test access port; Application specific integrated circuits; Built-in self-test; Circuit testing; Control systems; Field programmable gate arrays; Integrated circuit testing; Logic circuits; Logic testing; Reconfigurable logic; System testing;
Conference_Titel :
ASIC Conference and Exhibit, 1997. Proceedings., Tenth Annual IEEE International
Conference_Location :
Portland, OR
Print_ISBN :
0-7803-4283-6
DOI :
10.1109/ASIC.1997.616978
