20 dBm CMOS class AB power amplifier design for low cost 2 GHz-2.45 GHz consumer applications in a 0.13 μm technology

Author

Knopik, Vincent ; Martineau, Baudouin ; Belot, Didier

Author_Institution

Central R&D, STMicroelectronics, Crolles, France

fYear

2005

fDate

23-26 May 2005

Firstpage

2675

Abstract

The paper presents a medium power amplifier (PA) design for 2.4 GHz applications in pure 0.13 μm CMOS technology. The design has been done with reliability concern and presents high current layout considerations. It consists of evaluating the maximum current in the access lines and sizing the devices as well, without degrading the overall performance. The front end is composed of two stages using several transistors in cascade configuration. It can deliver at least 20 dBm at the maximum output power with a measured compression point better than 16 dBm. The chip has been integrated in 0.13 μm 1.2 V and 2.5 V STMicroelectronics CMOS technology. The power stage consumes 220 mA under 2.5 V.

Keywords

CMOS analogue integrated circuits; UHF power amplifiers; electric current; integrated circuit design; integrated circuit reliability; 0.13 micron; 1.2 V; 2 to 2.45 GHz; 2.5 V; 220 mA; CMOS class AB power amplifier design; access line current; cascaded transistors; consumer applications; high current layout; medium power amplifier; reliability; CMOS technology; Costs; Equations; Impedance; Narrowband; Paper technology; Power amplifiers; Power generation; Radio frequency; Voltage;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuits and Systems, 2005. ISCAS 2005. IEEE International Symposium on

Print_ISBN

0-7803-8834-8

Type

conf

DOI

10.1109/ISCAS.2005.1465177

Filename

1465177