DocumentCode :
3545768
Title :
A 1-V 2.4-GHz low-power fractional-N frequency synthesizer with sigma-delta modulator controller
Author :
Lee, Shuenn-Yuh ; Cheng, Chung-Han ; Huang, Ming-Feng ; Lee, Shyh-Chyang
Author_Institution :
Dept. of Electr. Eng., Nat. Chung-Cheng Univ., Chia-Yi, Taiwan
fYear :
2005
fDate :
23-26 May 2005
Firstpage :
2811
Abstract :
A 1-V low-power 2.4-GHz fractional-N frequency synthesizer with sigma-delta modulator controller for Bluetooth applications is implemented in 0.18 μm CMOS technology. A novel structure dual-modulus divide-by-128/129 prescaler using a dynamic D-flip-flop is proposed and the operating clock frequency can reach as high as 2.6 GHz at 1-V supply voltage. Moreover, a third-order feedforward sigma-delta modulator (SDM) is employed as a modulus controller to achieve an appropriate division ratio and suppress the fractional spurs. Simulation results show the synthesizer possesses a tuning range of 2.136 to 2.53 GHz and a phase noise of -126.85 dBc/Hz at 1 MHz offset. Moreover, the core area without the SDM and the loop filter is 0.85 mm2, and the total power consumption is 8.94 mW.
Keywords :
Bluetooth; CMOS analogue integrated circuits; frequency synthesizers; integrated circuit design; low-power electronics; power consumption; sigma-delta modulation; 0.18 micron; 1 V; 2.136 to 2.53 GHz; 8.94 mW; Bluetooth; CMOS technology; design consideration; division ratio; dual-modulus prescaler; dynamic D-flip-flop; feedforward sigma-delta modulator; fractional spur suppression; low-power fractional-N frequency synthesizer; modulus controller; phase noise; power consumption; Bluetooth; CMOS technology; Clocks; Delta-sigma modulation; Filters; Frequency conversion; Frequency synthesizers; Phase noise; Tuning; Voltage;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Circuits and Systems, 2005. ISCAS 2005. IEEE International Symposium on
Print_ISBN :
0-7803-8834-8
Type :
conf
DOI :
10.1109/ISCAS.2005.1465211
Filename :
1465211
Link To Document :
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