• DocumentCode
    3545857
  • Title

    ODE: output direct state machine encoding

  • Author

    Forrest, J.

  • Author_Institution
    Dept. of Comput., Univ. of Manchester Inst. of Sci. & Technol., UK
  • fYear
    1995
  • fDate
    18-22 Sep 1995
  • Firstpage
    600
  • Lastpage
    605
  • Abstract
    A somewhat novel approach is presented for determining FSM state codes. Instead of producing an assignment designed to minimise the overall logic of the machine, all Moore outputs are converted to state bits. Pure state bits are only introduced as a final resort. This results in very simple output equations at the expense of more complex next state equations. The total number of output and state bits is usually reduced-a feature that has major advantages on most PLDs. Perhaps the greatest advantage, though, is that outputs are glitch-free. The propagation delays for PLD implementations are also minimised.
  • Keywords
    codes; delays; finite state machines; minimisation of switching nets; state assignment; Moore outputs; finite state machines; next state equations; output direct state machine encoding; output equations; propagation delays; state codes; Automata; Digital systems; Encoding; Equations; Flip-flops; Input variables; Logic design; Minimization; Propagation delay; Terminology;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Design Automation Conference, 1995, with EURO-VHDL, Proceedings EURO-DAC '95., European
  • Print_ISBN
    0-8186-7156-4
  • Type

    conf

  • DOI
    10.1109/EURDAC.1995.527468
  • Filename
    527468