Efficient frame-level pipelined array architecture for full-search block-matching motion estimation

Motion estimation plays an important role in video compression to remove temporal redundancies between successive frames. An efficient frame-level pipelined FSBM (full-search block-matching) motion estimation systolic array architecture for the search range p=kN (k>1/2) is proposed. Design efforts are made to remove data broadcasting operations, to achieve 100% processor utilization and to reduce the hardware overhead while still keeping the scalability of the search range. It compares favorably with existing motion estimation architectures in terms of hardware cost, performance and complexity of architecture. As such, this architecture offers a feasible solution for digital TV and HDTV video picture formats.