Title :
A very-high-speed low-power low-voltage fully differential CMOS sample-and-hold circuit with low hold pedestal
Author :
Tsung-Sum Lee ; Chi-Chang Lu ; Shen-Hau Yu ; Jian-Ting Zhan
Author_Institution :
Dept. of Electron. Eng., Nat. Yunlin Univ. of Sci. & Technol., Taiwan
Abstract :
A new technique for realizing a very-high-speed low-power low-voltage fully differential CMOS sample-and-hold circuit with low hold pedestal is presented. The fully differential double-sampled design relaxes the trade-off between sampling speed and the sampling precision. Simulation results are given to demonstrate the potential advantage of the new technique.
Keywords :
CMOS analogue integrated circuits; low-power electronics; sample and hold circuits; CMOS sample-and-hold circuit; double-sampled design; fully differential sample-and-hold circuit; hold pedestal; low-power sample-and-hold circuit; low-voltage sample-and-hold circuit; sampling precision; sampling speed; very-high-speed sample-and-hold circuit; CMOS technology; Circuit noise; Circuit simulation; Distortion; Feedback circuits; Image sampling; Sampling methods; Switches; Switching circuits; Timing;
Conference_Titel :
Circuits and Systems, 2005. ISCAS 2005. IEEE International Symposium on
Conference_Location :
Kobe
Print_ISBN :
0-7803-8834-8
DOI :
10.1109/ISCAS.2005.1465286
