Subthreshold-leakage suppressed switched capacitor circuit based on super cut-off CMOS (SCCMOS)

Author

Ishida, K. ; Kanda, K. ; Tamtrakarn, A. ; Kawaguchi, H. ; Sakurai, T.

Author_Institution

Center for Collaborative Res., Univ. of Tokyo, Japan

fYear

2005

fDate

23-26 May 2005

Firstpage

3119

Abstract

A subthreshold-leakage suppressed switched capacitor (SC) circuit based on a super cut-off CMOS (SCCMOS) scheme is introduced. This scheme realizes low-voltage SC circuits using low threshold voltage (V_TH) transistors which are superior in drivability and are compatible with digital circuits. The SC circuit cannot be operated under 0.5 V with high-V_TH devices, but, on the other hand, SC circuits with low-V_TH transistors suffer from charge loss, even in analog operations. A 0.5-V sigma-delta modulator with the proposed scheme is successfully manufactured and measured by using a 0.15-μm FD-SOI process with 0.1-V V_THN transistors.

Keywords

CMOS integrated circuits; integrated circuit design; mixed analogue-digital integrated circuits; sigma-delta modulation; silicon-on-insulator; switched capacitor networks; 0.1 V; 0.15 micron; 0.5 V; FD-SOI process; Si; fully depleted SOI process; low threshold voltage transistors; low-voltage switched capacitor circuits; subthreshold-leakage suppressed switched capacitor circuit; super cut-off CMOS; Analog circuits; Collaboration; Delta-sigma modulation; Digital circuits; Leakage current; Subthreshold current; Switched capacitor circuits; Transistors; Very large scale integration; Voltage;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuits and Systems, 2005. ISCAS 2005. IEEE International Symposium on

Print_ISBN

0-7803-8834-8

Type

conf

DOI

10.1109/ISCAS.2005.1465288

Filename

1465288