Switched-capacitor circuits using a single-phase scheme

Author

Goes, J. ; Vaz, B. ; Paulino, N. ; Pinto, H. ; Monteiro, R. ; Garção, A.S.

Author_Institution

UNINOVA - CRI, Portugal

fYear

2005

fDate

23-26 May 2005

Firstpage

3123

Abstract

A novel single phase scheme for use in switched-capacitor (SC) circuits is described. Signal integrity is preserved by exploring the gap between the high conductance region of PMOS and NMOS switches at low power-supply voltages and the fast clock transitions that exist in advanced CMOS technologies. In order to illustrate the attractiveness of the proposed scheme, two practical circuit examples are presented. Electrical simulated results of a low-voltage 2^nd-order ΣΔ modulator clearly demonstrate the improvements in terms of harmonic distortion that can be achieved using this technique.

Keywords

CMOS integrated circuits; harmonic distortion; integrated circuit design; sigma-delta modulation; switched capacitor networks; ΣΔ modulator; CMOS technologies; NMOS switches; PMOS switches; analog switches; harmonic distortion; high conductance region; sigma-delta modulator; single-phase scheme; switched-capacitor circuits; CMOS technology; Circuit simulation; Clocks; Harmonic distortion; Low voltage; MOS devices; Sampling methods; Switched capacitor circuits; Switches; Switching circuits;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuits and Systems, 2005. ISCAS 2005. IEEE International Symposium on

Print_ISBN

0-7803-8834-8

Type

conf

DOI

10.1109/ISCAS.2005.1465289

Filename

1465289