DocumentCode :
3546325
Title :
Low power optimization of bit-serial digital filters
Author :
Astrom, Pontus ; Nilsson, Peter ; Torkelsson, Mats
Author_Institution :
Dept. of Appl. Electron., Lund Univ., Sweden
fYear :
1997
fDate :
7-10 Sep 1997
Firstpage :
229
Lastpage :
232
Abstract :
A new approach to optimize full custom, fixed coefficient bit-serial filters aimed at high sample rate and low power consumption is presented. The idea is to trade the filter order with the coefficient length. To show the results two filters were designed and implemented, one as a minimum order filter and the other as a minimum coefficient filter. Measurements shows that a ten fold increase in sample rate can be obtained at half the power consumption
Keywords :
CMOS digital integrated circuits; application specific integrated circuits; circuit optimisation; digital filters; integrated circuit design; CMOS process; bit-serial digital filters; coefficient length; filter order; fixed coefficient; full custom design; high sample rate; low power optimization; minimum coefficient filter; minimum order filter; wideband filter; Arithmetic; Band pass filters; Bandwidth; Baseband; Delay; Design optimization; Digital filters; Energy consumption; Passband; Testing;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
ASIC Conference and Exhibit, 1997. Proceedings., Tenth Annual IEEE International
Conference_Location :
Portland, OR
ISSN :
1063-0988
Print_ISBN :
0-7803-4283-6
Type :
conf
DOI :
10.1109/ASIC.1997.617011
Filename :
617011
Link To Document :
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