Calculation of intermodulation distortion in CMOS transconductance stage

Author

Liu, Lu ; Wang, ZhiHua ; Li, GuoLin

Author_Institution

Dept. of Electron. Eng., Tsinghua Univ., Beijing, China

fYear

2005

fDate

23-26 May 2005

Firstpage

3700

Abstract

The linearity of the transconductance stage is of major concern in the design of some analog circuits. In this paper, Volterra series expansion is used to compute the intermodulation distortion of high frequency CMOS transconductance stage with source degeneration resistor. The MOS model used in this paper includes short-channel effects and gate-source capacitance, gate-drain capacitance, and output resistance of the MOS transistor. Analytical results are compared with simulation results and the influences of circuit parameters on circuit linearity are discussed.

Keywords

CMOS analogue integrated circuits; Volterra series; capacitance; electric resistance; intermodulation distortion; resistors; MOS model; Volterra series expansion; analog circuit design; circuit linearity; circuit parameters; gate-drain capacitance; gate-source capacitance; high frequency CMOS transconductance stage; intermodulation distortion; output resistance; short-channel effects; source degeneration resistor; Analog circuits; Capacitance; Computational modeling; Frequency; Intermodulation distortion; Linearity; MOSFETs; Resistors; Semiconductor device modeling; Transconductance;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuits and Systems, 2005. ISCAS 2005. IEEE International Symposium on

Print_ISBN

0-7803-8834-8

Type

conf

DOI

10.1109/ISCAS.2005.1465433

Filename

1465433