LVDS I/O buffers with a controlled reference circuit

Author

Gabara, Thaddeus ; Fischer, Wilhelm ; Werner, W. ; Siegel, Stefan ; Kothandaraman, Makeshwar ; Metz, Peter ; Gradl, Dave

Author_Institution

Lucent Technol., AT&T Bell Labs., Murray Hill, NJ, USA

fYear

1997

fDate

7-10 Sep 1997

Firstpage

311

Lastpage

315

Abstract

A controlled reference circuit maintains the output voltage levels and current values of an LVDS output buffer constant over (PVT) processing, voltage supply, and temperature variations. The reference circuit requires one external resistor and generates two DC control voltages which are applied to all output buffers. An on-chip resistance is described which maintains a tightly controlled impedance of approximately 100 Ω over the common mode range of 0 to 2.4 V. A measured waveform at 1.244 Gb/s is given

Keywords

application specific integrated circuits; buffer circuits; reference circuits; voltage control; 0 to 2.4 V; 1.244 Gbit/s; 100 ohm; DC control voltage; LVDS I/O buffer; PVT processing; common mode range; controlled reference circuit; external resistor; impedance; on-chip resistance; temperature variation; voltage supply; waveform; CMOS technology; Capacitance; DC generators; Electrical resistance measurement; Impedance; Integrated circuit interconnections; Resistors; Switches; Temperature control; Voltage control;

fLanguage

English

Publisher

ieee

Conference_Titel

ASIC Conference and Exhibit, 1997. Proceedings., Tenth Annual IEEE International

Conference_Location

Portland, OR

ISSN

1063-0988

Print_ISBN

0-7803-4283-6

Type

conf

DOI

10.1109/ASIC.1997.617028

Filename

617028