A low power baseband processor with clock variance-tolerant for UHF RFID transponder

A novel low-power digital baseband processor for a passive UHF RFID transponder in compliance with the ISO 18000-6B protocol is presented in this paper. By analysing the system requirement, different techniques are proposed for reducing power consumption. Furthermore, a novel clock generating scheme is implemented to accommodate the fluctuation of the frequency from the local oscillator. The chip was designed in TSMC 0.18μm mixed-signal CMOS process, and the area of the proposed baseband processor is 0.71mm×0.155mm. Post-layout simulation results show that the baseband processor dissipates only 0.92uW at 1.28MHz clock.