DocumentCode :
3547112
Title :
Performance model for inter-chip communication considering inductive cross-talk and cost
Author :
LaMeres, Brock J. ; Khatri, Sunil P.
Author_Institution :
Dept. of Electr. & Comput. Eng., Colorado Univ., Boulder, CO, USA
fYear :
2005
fDate :
23-26 May 2005
Firstpage :
4130
Abstract :
We present an analytical method to perform the design of the I/O subsystem of an IC given its throughput requirements. Our method can be used to select the IC package, along with the bus size and speed so as to minimize I/O cost. We have validated our model by conducting simulations on three industry-standard packages while varying the bus width, slew rate, and signal-to-power ground ratio. Our experimental results track closely with the analytical model. We demonstrate for the packages considered that it is more cost effective to use faster, narrower busses rather than slower wider busses to achieve a desired system throughput.
Keywords :
crosstalk; integrated circuit interconnections; integrated circuit modelling; integrated circuit packaging; printed circuit design; system buses; I/O cost minimization; IC I/O subsystem; IC package; bus size; bus speed; bus width; inductive cross-talk; inter-chip communication performance model; signal-to-power ground ratio; slew rate; throughput; Costs;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Circuits and Systems, 2005. ISCAS 2005. IEEE International Symposium on
Print_ISBN :
0-7803-8834-8
Type :
conf
DOI :
10.1109/ISCAS.2005.1465540
Filename :
1465540
Link To Document :
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