Impact of multicycled scheduling on power-area tradeoffs in behavioural synthesis

Multicycling is a widely investigated technique for performance optimisation in behavioural synthesis. It allows an operation to execute over two or more control steps with the aim of increasing the performance and/or minimising the power consumption. This paper presents a new time-constrained scheduling (TCS) algorithm that takes into account the combined influence of clock period and the multicycled functional units execution time on the quality of the schedules in terms of power and area. It is shown that it is possible to produce a set of solutions that have similar power consumptions, but differ in terms of resource requirements, yet meet the imposed real-time constraints. Furthermore, extensive experiments on behavioural benchmarks show that the proposed approach is capable of obtaining schedules with a single supply domain that have identical resource requirements and comparable power consumption to schedules obtained using multiple supply voltages, further reducing the design complexity.