• DocumentCode
    3547209
  • Title

    A delay line based CMOS time digitizer IC with 13 ps single-shot precision

  • Author

    Jansson, Jussi ; Mäntyniemi, Antti ; Kostamovaara, Juha

  • Author_Institution
    Dept. of Electr. & Inf. Eng., Oulu Univ., Finland
  • fYear
    2005
  • fDate
    23-26 May 2005
  • Firstpage
    4269
  • Abstract
    This paper introduces an integrated digital CMOS time-to-digital converter which measures time periods with picosecond-level resolution. The circuit was fabricated in a 0.35 μm standard digital CMOS process. 13 ps rms single-shot precision was achieved by using a counter and a two-level nested DLL interpolation. Interpolators, which divide the cycle time of the 145 MHz reference clock to 512 pieces, provided 13.5 ps LSB width. The temperature drift was below 0.05 ps/°C. The power consumption with a 3.3 V operating voltage was 55 mW.
  • Keywords
    CMOS digital integrated circuits; analogue-digital conversion; delay lines; delay lock loops; interpolation; 0.35 micron; 145 MHz; 3.3 V; 55 mW; CMOS time digitizer IC; delay line; digital CMOS; interpolators; picosecond-level resolution; single-shot precision; time-to-digital converter; two-level nested DLL interpolation; CMOS integrated circuits; CMOS process; Clocks; Counting circuits; Delay lines; Energy consumption; Integrated circuit measurements; Interpolation; Temperature; Time measurement;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Circuits and Systems, 2005. ISCAS 2005. IEEE International Symposium on
  • Print_ISBN
    0-7803-8834-8
  • Type

    conf

  • DOI
    10.1109/ISCAS.2005.1465574
  • Filename
    1465574