A low-power and high-speed quaternary interconnection link using efficient converters

We introduce a new quaternary link including a binary to-quaternary encoder and a quaternary-to-binary decoder in voltage-mode multiple-valued logic (MVL). This link improves the transistor count compared to existing designs and it has no DC current path. The complete link was simulated with SPICE in two recent technologies. It additionally shows interesting advantages in power consumption for global interconnects compared to full-swing signaling binary systems (up to 46% less energy consumption). Its low propagation delay is also an advantage in the design of high-speed on-chip links.