Title :
A 128×128 floating gate imager with self-adapting fixed pattern noise reduction
Author :
Wong, Yanyi Liu ; Cohen, Marc H. ; Abshire, Pamela A.
Author_Institution :
Inst. for Syst. Res., Univ. of Maryland, College Park, MD, USA
Abstract :
We present a novel CMOS current-mode imager that uses nonvolatile floating gate charge storage in the pixel for automatic cancellation of fixed-pattern noise (FPN) caused by fabrication process variations. We demonstrate the ability to reduce the variance of the initial FPN over a range of incident light intensities. Each pixel incorporates a unique circuit that uses pFET hot-electron injection to adapt out the FPN for each pixel in parallel. The design has been fabricated in a commercially available 0.5 μm process. Experimental results confirm the ability to reduce the FPN variance by a factor of 98.23 at the intensity at which adaptation was performed, and by a factor of 9.22 over 5 orders of magnitude of intensity. The adaptation takes ∼6 minutes and the 128×128 image can be read at 7 frames/sec. The chip consumes 43.3 mW.
Keywords :
CMOS image sensors; current-mode circuits; image denoising; integrated circuit design; integrated circuit noise; interference suppression; power consumption; semiconductor device noise; 0.5 micron; 128 pixel; 16384 pixel; 43.3 mW; CMOS current-mode imager; CMOS imager; automatic noise cancellation; fixed-pattern noise; floating gate imager; incident light intensities; nonvolatile floating gate charge storage; pFET hot-electron injection; power consumption; self-adapting fixed pattern noise reduction; variance; Circuits; Dynamic range; Educational institutions; Image storage; Noise cancellation; Noise reduction; Optical noise; Pixel; Secondary generated hot electron injection; Voltage;
Conference_Titel :
Circuits and Systems, 2005. ISCAS 2005. IEEE International Symposium on
Print_ISBN :
0-7803-8834-8
DOI :
10.1109/ISCAS.2005.1465835