DocumentCode :
3547647
Title :
SH-mobile - low power application processor for cellular [3G cellular phones]
Author :
Kamae, Shoichi ; Irita, Takahiro ; Tsukimori, Akifumi ; Tarnaki, S. ; Hattori, Toshihiro ; Yoshioka, Shinichi
Author_Institution :
Renesas Technol. Corp, Tokyo, Japan
fYear :
2005
fDate :
23-26 May 2005
Firstpage :
5349
Abstract :
Renesas Technology Corp. gains world wide support in the field of application processors for cellular phones (SH-mobile), where various performance demanding applications must be handled with very low power consumption. Techniques of the SH-mobile to reduce leakage current, such as a partial power shut down mechanism and a methodology of multi-threshold transistors are introduced. Also advantages of the SH-mobile architecture, such as dual CPU core, large internal memory, and various media accelerators, are described from a low power consumption point of view.
Keywords :
3G mobile communication; cellular radio; leakage currents; low-power electronics; microprocessor chips; mobile handsets; 3G cellular phones; SH-mobile processor; dual CPU core; leakage current reduction; low power application processor; media accelerators; multithreshold transistors; partial power shut down mechanism; processor internal memory; Cameras; Cellular phones; Clocks; Computer architecture; Digital signal processing; Digital signal processing chips; Energy consumption; Frequency; Pipelines; Size control;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Circuits and Systems, 2005. ISCAS 2005. IEEE International Symposium on
Print_ISBN :
0-7803-8834-8
Type :
conf
DOI :
10.1109/ISCAS.2005.1465844
Filename :
1465844
Link To Document :
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