A low-power switched-current CDMA matched filter employing MOS-linear matching cell and output A/D converter

Author

Nakayama, Tomoyuki ; Yamasaki, Toshihiko ; Tadashi, S.

Author_Institution

Dept. of Frontier Informatics, Univ. of Tokyo, Japan

fYear

2005

fDate

23-26 May 2005

Firstpage

5365

Abstract

A low-power switched-current CDMA matched filter has been developed. The front-end V/I converter has been eliminated by merging the function into each matching cell utilizing the MOS linear I-V characteristics. A low-power A/D converter has also been developed to establish a smooth interfacing to digital back-end processing. The prototype chip was fabricated in a 0.35-μm CMOS technology, and a low power operation of 1.65 mW, including the A/D converter, at 11 Mchip/s with 2 V power supply has been demonstrated.

Keywords

CMOS integrated circuits; analogue-digital conversion; code division multiple access; current-mode circuits; low-power electronics; matched filters; mobile radio; switched current circuits; 0.35 micron; 1.65 mW; 2 V; CMOS; MOS linear I-V characteristics; MOS-linear matching cell; current-mode matched filter; digital back-end processing interface; low-power dynamic flash A/D converter; low-power matched filter; mobile communication systems; output A/D converter; switched-current CDMA matched filter; CMOS technology; Circuits; Impedance matching; Informatics; Matched filters; Merging; Multiaccess communication; Power dissipation; Switching converters; Threshold voltage;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuits and Systems, 2005. ISCAS 2005. IEEE International Symposium on

Print_ISBN

0-7803-8834-8

Type

conf

DOI

10.1109/ISCAS.2005.1465848

Filename

1465848