A direct synthesis method of cascaded continuous-time sigma-delta modulators

This paper presents an efficient method to synthesize cascaded sigma-delta modulators implemented with continuous-time circuits. It is based on the direct synthesis of the whole cascaded architecture in the continuous-time domain instead of using a discrete-to-continuous time transformation as has been done in previous approaches. In addition to place the zeros of the loop filter in an optimum way, the proposed methodology leads to more efficient architectures in terms of circuit complexity, power consumption and robustness with respect to circuit nonidealities.