DocumentCode :
3547785
Title :
Energy and latency evaluation of NoC topologies
Author :
Kreutz, Marcio ; Marcon, Cesar ; Carro, Luigi ; Calazans, Ney ; Susin, Altamiro A.
Author_Institution :
GME-Informatica, Univ. Fed. do Rio Grande do Sul, Brazil
fYear :
2005
fDate :
23-26 May 2005
Firstpage :
5866
Abstract :
Mapping applications onto different networks-on-chip (NoCs) topologies is done by mapping processing cores on local ports of routers considering requirements like latency and energy consumption. In this work, an algorithm devoted to evaluate different topologies is proposed. The evaluation starts with an application model called application communication pattern (ACP), which specifies tasks with the computation load and communication profile. ACP focuses on communication aspects and is an appropriate model to obtain mappings that comply with application requirements. ACP allows fast analysis over many NoC topologies, helping the system designer to evaluate the communication performance of a NoC-based system; this performance strongly depends on the placement of the cores, and it is computationally hard to find the optimal placement.
Keywords :
integrated circuit design; multiprocessor interconnection networks; network topology; telecommunication network routing; ACP model; NoC topology latency; application communication pattern; communication profile; computation load; energy consumption; networks-on-chip; processing core router local port mapping; Bandwidth; Computer architecture; Delay; Energy consumption; Network topology; Network-on-a-chip; Performance analysis; Processor scheduling; Space exploration; Tiles;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Circuits and Systems, 2005. ISCAS 2005. IEEE International Symposium on
Print_ISBN :
0-7803-8834-8
Type :
conf
DOI :
10.1109/ISCAS.2005.1465973
Filename :
1465973
Link To Document :
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