Rapid and precise instruction set evaluation for application specific processor design

The selection of instruction set of a processor greatly influences the processor hardware and execution of software in speed, area, and power. Evaluation of the instruction set is an important task in designing a processor specific to a given application. In this paper, a technique to rapidly and precisely evaluate instruction sets for the given application is proposed. It uses an efficient branch and bound technique to explore the combination of instructions and evaluates the execution steps by task scheduling. The results show the proposed technique efficiently evaluates instruction sets for assumed processor hardware.