Exploiting concurrency through knowledge of event propagation in cell rate ATM simulation

A time stepping approach has been adopted by RACE project R2059 ICM for time synchronisation in a parallel event driven ATM network simulator whose purpose is to aid the development of a TMN testbed. This allows the simulation time in all the models distributed across a parallel computing architecture to be kept in step whilst minimising inter-processor communication overhead. Careful setting of the timestep size allows burst length quantisation errors to be minimised. Results are presented which demonstrate that timestepping can allow, efficient parallel simulation whilst keeping burst length quantisation errors within the requirements of the ICM project. However, detailed traffic studies require burst length quantisation to be eliminated altogether as well as improved speedup from parallelising the network model. This paper describes a study into the effectiveness of a two level timestep switching scheme, designed to eliminate burst length quantisation effects whilst maximising the speed of the simulation. The results suggest that, in order to exploit more effectively the concurrency in a spatially decomposed cell rate network simulator an understanding of event propagation on a network level is required. Cell rate analysis shows that events propagate in distinctly differing ways along connections in which the burst scale queueing of cells occurs and along connections in which there is no burst scale queueing. The paper concludes by showing how such knowledge can be used to identify situations in which independent events occur that can be processed concurrently, hence allowing alternative synchronisation schemes