DocumentCode :
3548246
Title :
Signature analysis with modified linear feedback shift registers (M-LFSRs)
Author :
Raina, R. ; Marionos, P.N.
Author_Institution :
Dept. of Electr. Eng., Duke Univ., Durham, NC, USA
fYear :
1991
fDate :
25-27 June 1991
Firstpage :
88
Lastpage :
95
Abstract :
A signature analysis technique that uses modified linear feedback shift registers (LFSRs) is presented. It is demonstrated that the modified-LFSR-based analyzers can be designed with significantly lower aliasing probability compared to conventional LFSRs of the same size. The methodology for their design is described. Analytic expressions for their aliasing probability, hardware requirements, and the average tet-time overhead are obtained and experimentally verified. Studies using several circuit-under-test responses corroborate the improvement in the aliasing probability for the same hardware (or reduction in hardware for the same aliasing probability) when the modified LFSRs are used. The extra test-time required by the modified LFSRs is found to be nominal (<5%) in a majority of instances.<>
Keywords :
feedback; logic testing; shift registers; M-LFSRs; aliasing probability; analytic expressions; average tet-time overhead; circuit-under-test responses; hardware requirements; modified linear feedback shift registers; signature analysis; Built-in self-test; Circuit faults; Circuit testing; Clocks; Compaction; Hardware; Linear feedback shift registers; Logic circuits; Steady-state; Vectors;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Fault-Tolerant Computing, 1991. FTCS-21. Digest of Papers., Twenty-First International Symposium
Conference_Location :
Montreal, Quebec, Canada
Print_ISBN :
0-8186-2150-8
Type :
conf
DOI :
10.1109/FTCS.1991.146639
Filename :
146639
Link To Document :
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