• DocumentCode
    3548290
  • Title

    A perturbation-aware noise convergence methodology for high frequency microprocessors

  • Author

    Saxena, Prashant ; Lalgudi, Kumar N. ; Greub, Hans J. ; Wang-Roveda, Janet M.

  • Author_Institution
    Intel Labs, Intel Corp., Hillsboro, OR, USA
  • Volume
    2
  • fYear
    2005
  • fDate
    18-21 Jan. 2005
  • Firstpage
    717
  • Abstract
    We present a practical flow that automates the process of analyzing noise failures and determining and implementing the most appropriate design fixes in high performance designs. For each noise problem, the flow implicitly identifies the most sensitive relevant electrical parameter(s) which it then maps to a physical solution that minimizes design perturbation. Integrated with standard physical synthesis, it was used extensively in a high volume 90 nm multi-GHz microprocessor project.
  • Keywords
    integrated circuit noise; microprocessor chips; microwave integrated circuits; perturbation techniques; 90 nm; design perturbation; high frequency microprocessors; high performance designs; noise failures; perturbation-aware noise convergence; physical synthesis; Circuit noise; Convergence; Crosstalk; Design automation; Failure analysis; Frequency; Microprocessors; Scheduling; Timing; USA Councils;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Design Automation Conference, 2005. Proceedings of the ASP-DAC 2005. Asia and South Pacific
  • Print_ISBN
    0-7803-8736-8
  • Type

    conf

  • DOI
    10.1109/ASPDAC.2005.1466441
  • Filename
    1466441