DocumentCode
3548382
Title
An improved P-admissible floorplan representation based on corner block list
Author
Wang, Renshen ; Dong, Sheqin ; Hong, Xianlong
Author_Institution
Dept. of Comput. Sci. & Technol., Tsinghua Univ., Beijing, China
Volume
2
fYear
2005
fDate
18-21 Jan. 2005
Firstpage
1115
Abstract
The corner block list representation (CBL) introduced in 2000 is an efficient and effective model for floorplanning and placement while still having some limitations such as redundancy and incompleteness. In this paper, we present an auxiliary 3-route model to eliminate the redundancy and insert empty rooms to resolve the incompleteness. Finally we attain a P-admissible representation ECBL (2) which has higher performances than the original CBL and the count of its solution space is O((2n)!26n/n!n4).
Keywords
VLSI; computational complexity; integrated circuit modelling; redundancy; auxiliary 3-route model; corner block list; effective model; efficient model; improved P-admissible floorplan representation; incompleteness limitations; redundancy limitations; Circuits; Computer science; Design optimization; Topology; Very large scale integration;
fLanguage
English
Publisher
ieee
Conference_Titel
Design Automation Conference, 2005. Proceedings of the ASP-DAC 2005. Asia and South Pacific
Print_ISBN
0-7803-8736-8
Type
conf
DOI
10.1109/ASPDAC.2005.1466536
Filename
1466536
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