Bridging, transition, and stuck-open faults in self-testing CMOS checkers

Author

Millman, S.D. ; McCluskey, E.J.

Author_Institution

Dept. of Electr. Eng. & Comput. Sci., Stanford Univ., CA, USA

fYear

1991

fDate

25-27 June 1991

Firstpage

154

Lastpage

161

Abstract

The consequences of bridging, transition, and stuck-open faults in self-testing checkers designed only for single stuck-at faults are examined. A methodology for design that guarantees that the checkers will be self-testing in the presence of bridging, transition and stuck-open faults is established. This methodology is applied to several implementations of self-testing checkers. Simulations confirm that these checkers are self-testing in the presence of bridging, transition, and stuck-open faults. The problems associated with testing the checkers in the presence of non-stuck-at faults and the problems that result from reducing the number of checker outputs from two to one are discussed. It is shown that self-testing checkers designed for stuck-at faults will remain self-testing in the presence of nonclassical faults.<>

Keywords

CMOS integrated circuits; automatic testing; fault location; integrated circuit testing; logic testing; bridging; self-testing CMOS checkers; simulations; stuck-at faults; stuck-open faults; transition; Automatic testing; Built-in self-test; CMOS technology; Circuit faults; Computer errors; Design methodology; Electrical fault detection; Fault detection; Laboratories; Runtime;

fLanguage

English

Publisher

ieee

Conference_Titel

Fault-Tolerant Computing, 1991. FTCS-21. Digest of Papers., Twenty-First International Symposium

Conference_Location

Montreal, Quebec, Canada

Print_ISBN

0-8186-2150-8

Type

conf

DOI

10.1109/FTCS.1991.146655

Filename

146655