Reconfigurable adaptive FEC system with interleaving

This paper proposes a reconfigurable adaptive FEC system with interleaving. For adaptive FEC schemes, we can implement an optimal RS decoder composed of minimum hardware units for any given error correction capability. If the hardware units of the RS decoder can be reduced for any given t, we can embed as large deinterleaver as possible into the RS decoder for each t. Reconfiguring the RS decoder embedded with the expanded deinterleaver dynamically for each t, allows us to decode larger interleaved codes which are more robust FEC codes to burst errors. Our reconfigurable adaptive FEC system with interleaving achieves better packet error rate and higher throughput than fixed hardware systems.