DocumentCode :
3548421
Title :
A novel configurable motion estimation architecture for high-efficiency MPEG-4/H.264 encoding
Author :
Li, Tiejun ; Li, Sikun ; Shen, Chengdong
Author_Institution :
Sch. of Comput. Sci., National Univ. of Defense Technol., Changsha, China
Volume :
2
fYear :
2005
fDate :
18-21 Jan. 2005
Firstpage :
1264
Abstract :
This paper proposes a flexible, efficient and configurable motion estimation architecture. The core of this architecture is a motion estimation engine NPSPE (nine points search pattern engine), which can support the latest efficient block-based motion estimation algorithms used by MPEG-4/H.264 encoding, such as PMVFAST and EPZS. This architecture has been designed and synthesized in SMIC 0.18um technology. The result shows it consumes only 17.5K gates, but its computing efficiency is about 15 times higher than the well-known low power FS engine including 16 PEs while its PSNR is similar to FS.
Keywords :
hardware description languages; image coding; logic design; motion estimation; 0.18 micron; EPZS; MPEG-4/H.264 encoding; NPSPE; PMVFAST; SMIC; motion estimation algorithms; motion estimation architecture; nine points search pattern engine; Acceleration; Computer architecture; Computer science; Delay; Electronic mail; Encoding; Engines; MPEG 4 Standard; Motion estimation; Video sequences;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Design Automation Conference, 2005. Proceedings of the ASP-DAC 2005. Asia and South Pacific
Print_ISBN :
0-7803-8736-8
Type :
conf
DOI :
10.1109/ASPDAC.2005.1466573
Filename :
1466573
Link To Document :
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