A high performance QAM receiver for digital cable TV with integrated A/D and FEC decoder

Author

Shen, Bo ; Tian, Junhua ; Li, Zheng ; Su, Jianing ; Zhang, Qianling

Author_Institution

Fudan Univ., Shanghai, China

Volume

2

fYear

2005

fDate

18-21 Jan. 2005

Firstpage

1276

Abstract

A DVB-C/ITU J.83-A compliant QAM (quadrature amplitude modulation) demodulator suitable for digital cable TV is proposed, which can support 4-256QAM with variable bit rate up to 80Mbps. It integrates a 10-bit 40MSPS ADC, (204,188) Reed-Solomon decoder as well as a convolutional interleaver. The chip is implemented in SMIC 0.25μm CMOS technology with die size of 3.5×3.5 mm². It features wide carrier offset acquisition range, robust demodulation algorithm and small circuit area.

Keywords

CMOS integrated circuits; Reed-Solomon codes; analogue-digital conversion; cable television; digital television; integrated circuit design; interleaved codes; quadrature amplitude modulation; receivers; 0.25 micron; 3.5 mm; ADC; CMOS technology; DVB-C/ITU J.83; FEC decoder; QAM receiver; Reed-Solomon decoder; SMIC; convolutional interleaver; demodulator; digital cable TV; quadrature amplitude modulation; Bit rate; CMOS technology; Cable TV; Decoding; Demodulation; Digital video broadcasting; Quadrature amplitude modulation; Reed-Solomon codes; Robustness; TV receivers;

fLanguage

English

Publisher

ieee

Conference_Titel

Design Automation Conference, 2005. Proceedings of the ASP-DAC 2005. Asia and South Pacific

Print_ISBN

0-7803-8736-8

Type

conf

DOI

10.1109/ASPDAC.2005.1466576

Filename

1466576