DocumentCode
3549275
Title
Synthesis of saturating counters using traditional and non-traditional basic counters
Author
Wo, Zhaojun ; Koren, Israel
Author_Institution
Dept. of Electr. & Comput. Eng., Massachusetts Univ., Amherst, MA, USA
fYear
2005
fDate
27-29 June 2005
Firstpage
114
Lastpage
121
Abstract
Saturating counters are a newly defined class of generalized parallel counters that provide the exact number of inputs which are equal to 1 only if this number is below a given threshold. Such counters are useful in, for example, self-test and repair units for embedded memories. This paper defines saturating counters for arbitrary threshold values and presents several alternatives for their implementation. The delay and area of the proposed design alternatives are then estimated using a 0.25μm cell library. Finally, we study the behavior of saturating counters when the threshold approaches the number of input bits, i.e., the special case of non-saturating parallel counters.
Keywords
counting circuits; digital arithmetic; logic design; delay; digital arithmetic; logic design; parallel counter; Built-in self-test; Circuit faults; Counting circuits; Delay estimation; Image processing; Libraries;
fLanguage
English
Publisher
ieee
Conference_Titel
Computer Arithmetic, 2005. ARITH-17 2005. 17th IEEE Symposium on
ISSN
1063-6889
Print_ISBN
0-7695-2366-8
Type
conf
DOI
10.1109/ARITH.2005.42
Filename
1467630
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