Title :
Use of parallel polishing technique for root cause determination of EOS devices
Author :
Len, W.B. ; Xue, M.
Author_Institution :
Infineon Technol. Asia Pacific Pte Ltd., Singapore, Singapore
fDate :
27 June-1 July 2005
Abstract :
In this paper, a method to investigate the root cause beyond the burnt mark using a parallel polishing technique & electrical simulation is presented with case studies. It illustrated the usefulness in analyzing the failure root cause beyond the sighting of EOS burnt marks.
Keywords :
failure analysis; integrated circuit reliability; integrated circuit testing; polishing; EOS burnt mark; EOS device; electrical simulation; electrical-over-stress failures; parallel polishing technique; root cause determination; Analytical models; Cause effect analysis; Chemical analysis; Chemical compounds; Earth Observing System; Electrostatic discharge; Failure analysis; Inspection; Organic materials; Performance analysis;
Conference_Titel :
Physical and Failure Analysis of Integrated Circuits, 2005. IPFA 2005. Proceedings of the 12th International Symposium on the
Print_ISBN :
0-7803-9301-5
DOI :
10.1109/IPFA.2005.1469135
