Title :
An innovative gate oxide characterization technique in the failure analysis of 0.13μm process technology based MOSFET device
Author :
How, H.C. ; Ooi, K.B. ; Ng, J.C. ; Nizam, Mohd Khairul ; Ng, H.B.
Author_Institution :
Intel Technol. Sdn Bhd, Penang, Malaysia
fDate :
27 June-1 July 2005
Abstract :
In the present study, failure analysis was carried out to determine the failure mechanism of the 0.13μm process technology based microprocessor product that failed leakage test at production test floor, after constant voltage stress in the burn-in ovens. This follows by an innovative physical characterization technique to provide significant insights to the root-cause analysis of gate oxide breakdown induced failure by combining both wet chemical etching and transmission electron microscopy (TEM) on the same sample. While wet chemical etch is used to confirm gate oxide breakdown as the failure mechanism, TEM is employed to characterize the transformation of silicon substrate crystal structure through a novel TEM sample preparation technique.
Keywords :
MOSFET; crystal microstructure; etching; failure analysis; fault diagnosis; semiconductor device breakdown; semiconductor device reliability; silicon; transmission electron microscopy; 0.13 micron; MOSFET device; TEM; constant voltage stress; failure analysis; failure mechanism; gate oxide breakdown; gate oxide characterization technique; leakage test; microprocessor product; sample preparation technique; silicon substrate crystal structure; transmission electron microscopy; wet chemical etching; Chemical analysis; Chemical technology; Electric breakdown; Failure analysis; MOSFET circuits; Microprocessors; Production; Testing; Voltage; Wet etching;
Conference_Titel :
Physical and Failure Analysis of Integrated Circuits, 2005. IPFA 2005. Proceedings of the 12th International Symposium on the
Print_ISBN :
0-7803-9301-5
DOI :
10.1109/IPFA.2005.1469164