DocumentCode :
3549773
Title :
Vertex channel array transistor (VCAT) featuring sub-60nm high performance and highly manufacturable trench capacitor DRAM
Author :
Kito, M. ; Katsumata, R. ; Kondo, M. ; Ito, S. ; Miyano, K. ; Kido, M. ; Yasutake, H. ; Nagata, Y. ; Aoki, N. ; Aochi, H. ; Nitayama, A.
Author_Institution :
SoC R&D Center, Toshiba Corp., Kanagawa, Japan
fYear :
2005
fDate :
14-16 June 2005
Firstpage :
32
Lastpage :
33
Abstract :
Novel vertex channel array transistor (VCAT) fabricated on bulk silicon substrate is applied to trench capacitor DRAM cell for the first time. VCAT utilizes the vertexes as channel between top surface and (111) facet of selective epitaxial Si on active areas. It can be fabricated with much simpler process than FIN array transistor reported previously and fit to the process integration of trench capacitor DRAM cell. Almost 2 times higher on-current, smaller sub-threshold swing and less body effect than a conventional planar array transistor are demonstrated.
Keywords :
DRAM chips; MOSFET; capacitors; epitaxial growth; nanotechnology; silicon; 60 nm; FIN array transistor; Si; VCAT; bulk silicon substrate; planar array transistor; sub-threshold swing; trench capacitor DRAM cell; vertex channel array transistor; Capacitors; Electrodes; Fabrication; Information systems; Manufacturing processes; Random access memory; Semiconductor device manufacture; Silicon; Substrates; Transistors;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
VLSI Technology, 2005. Digest of Technical Papers. 2005 Symposium on
Print_ISBN :
4-900784-00-1
Type :
conf
DOI :
10.1109/.2005.1469200
Filename :
1469200
Link To Document :
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