Dual metal gate process by metal substitution of dopant-free polysilicon on high-K dielectric

Author

Park, Chang Seo ; Cho, Byung Jin ; Hwang, Wan Sik ; Loh, Wei Yip ; Tang, Lei Jun ; Kwong, Dim Lee

Author_Institution

Dept. of Eelectrical & Comput. Eng., National Univ. of Singapore, Singapore

fYear

2005

fDate

14-16 June 2005

Firstpage

48

Lastpage

49

Abstract

Dual metal gate integration scheme of using substituted Al (SA) and Pt_xSi with high Pt concentration on high-K dielectric is proposed. The process can achieve a wide range of work function difference (0.65 eV) and is almost free from Fermi level pinning, without adverse effects of polysilicon predoping.

Keywords

Fermi level; MOCVD; MOSFET; aluminium; annealing; chemical exchanges; dielectric materials; integrated circuits; nanotechnology; platinum compounds; semiconductor device metallisation; semiconductor-insulator-semiconductor structures; work function; Al; Fermi level pinning; PtSi; dopant-free polysilicon; dual metal gate integration scheme; dual metal gate process; high-k dielectric; metal substitution; polysilicon predoping; work function; Annealing; Boron; High-K gate dielectrics; Leakage current; MOSFET circuits; Microelectronics; Silicides; Silicon; Temperature; Wet etching;

fLanguage

English

Publisher

ieee

Conference_Titel

VLSI Technology, 2005. Digest of Technical Papers. 2005 Symposium on

Print_ISBN

4-900784-00-1

Type

conf

DOI

10.1109/.2005.1469207

Filename

1469207