DocumentCode
3549821
Title
Dopant profile engineering of CMOS devices formed by non-melt laser spike annealing
Author
Shima, Akio ; Wang, Yun ; Upadhyaya, Deepak ; Feng, Lucia ; Talwar, Somit ; Hiraiwa, Atsushi
Author_Institution
Micro Device Div., Hitachi Ltd., Tokyo, Japan
fYear
2005
fDate
14-16 June 2005
Firstpage
144
Lastpage
145
Abstract
We optimized the halo profile and deep source/drain junction profile of the devices that were fabricated by non-melt laser spike annealing (LSA). The optimized devices achieved 10%- and 20%-better performance compared to those by the conventional LSA and rapid thermal annealing (RTA), respectively. The hot carrier degradation was also reduced to an RTA-comparable level by the halo optimization. From these results we concluded that the dopant profile engineering specific to LSA is a key to obtaining good device performance and that the devices by the optimized LSA process are the most promising for hp65-node and beyond.
Keywords
CMOS integrated circuits; circuit optimisation; doping profiles; hot carriers; laser beam annealing; rapid thermal annealing; semiconductor junctions; CMOS devices; dopant profile engineering; halo optimization; halo profile; hot carrier degradation; hp65-node; nonmelt laser spike annealing; optimized devices; rapid thermal annealing; source/drain junction profile; Annealing; CMOS technology; Paper technology; Very large scale integration;
fLanguage
English
Publisher
ieee
Conference_Titel
VLSI Technology, 2005. Digest of Technical Papers. 2005 Symposium on
Print_ISBN
4-900784-00-1
Type
conf
DOI
10.1109/.2005.1469246
Filename
1469246
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