High performance FDSOI CMOS technology with metal gate and high-k

A high performance FDSOI CMOS technology featuring metal gate electrodes and high-k gate dielectrics is presented. Work-function tuning is accomplished by materials and process modification to achieve appropriate threshold voltages for FDSOI CMOS. The gate stacks exhibit an extremely thin effective inversion thickness (T_inv) down to 14A with a gate leakage current of 0.2A/cm². This represents a six order of magnitude leakage reduction compared to Poly/SiO₂. By optimizing the gate stack, the highest unstrained electron mobility is realized (207cm²A/s at E_eff=1Mv/cm) at T_inv=14A. Drive currents of 1050μA/μm and 770μA/μm at I_off of 90nA/μm and 28nA/μm are achieved for nMOS and pMOS respectively. This is the highest reported pFET drive current for metal gate transistors with high-k gate dielectrics. We also present FDSOI metal gate high-k ring oscillators and SRAM cells with static noise margin (SNM) of 328mV at V_dd=1,2V.