• DocumentCode
    3549903
  • Title

    A Miller divider based clock generator for MBOA-UWB application

  • Author

    Lee, Tai-Cheng ; Hua, Yen-Chuang

  • Author_Institution
    Dept. of Electr. Eng., National Taiwan Univ., Taipei, Taiwan
  • fYear
    2005
  • fDate
    16-18 June 2005
  • Firstpage
    34
  • Lastpage
    37
  • Abstract
    A Miller divider based clock generator is proposed for multi-band OFDM alliance (MBOA) ultrawideband (UWB) application. Employing closed-loop operation, the clock generator can produce three difference carrier frequencies with negligible in-band spurs while achieving less than 9.5-ns settling time. A transistor-sizing optimization technique for active inductors with a current-reusing technique is used to achieve low-power operation and area saving. Fabricated in a 0.18-μm technology, the clock generator only dissipates less than 22 mW from a 1.8-V power supply.
  • Keywords
    CMOS analogue integrated circuits; OFDM modulation; circuit optimisation; frequency dividers; inductors; integrated circuit design; low-power electronics; signal generators; ultra wideband communication; 0.18 micron; 1.8 V; CMOS analog integrated circuits; MBOA-UWB application; Miller divider; OFDM modulation; active inductors; circuit optimization; clock generator; closed-loop operation; current-reusing technique; difference carrier frequencies; frequency dividers; low-power electronics; low-power operation; multi-band OFDM alliance; signal generators; transistor-sizing optimization technique; ultra wideband communication; ultrawideband application; Amplitude modulation; Band pass filters; CMOS technology; Circuits; Clocks; Equations; Frequency synthesizers; Low pass filters; Power generation; Signal generators;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    VLSI Circuits, 2005. Digest of Technical Papers. 2005 Symposium on
  • Print_ISBN
    4-900784-01-X
  • Type

    conf

  • DOI
    10.1109/VLSIC.2005.1469327
  • Filename
    1469327