DocumentCode
3549954
Title
An autonomous SRAM with on-chip sensors in an 80nm double stacked cell technology
Author
Sohn, Kyomin ; Cho, Namjun ; Kim, Hyejung ; Kim, Kwanho ; Mo, Hyun-Sun ; Suh, Young-Ho ; Byun, Hyun-Geun ; Yoo, Hoi-Jun
Author_Institution
Dept. of Electr. Eng. & Comput. Sci., Korea Adv. Inst. of Sci. & Technol., Daejeon, South Korea
fYear
2005
fDate
16-18 June 2005
Firstpage
232
Lastpage
235
Abstract
An active solution to overcome the uncertainty and fluctuation in nano technology SRAM is introduced. It automatically adapts SRAM´s operation optimized for the process variation and operating environments by using on-chip timer, temperature sensor, substrate noise manager and leakage current monitor. A test SRAM chip fabricated with an 80nm SRAM process, shows that average power consumption is reduced by 9%, and the standard deviation decreases by 58%.
Keywords
SRAM chips; integrated circuit noise; leakage currents; temperature sensors; 80 nm; SRAM chip; SRAM process; double stacked cell technology; leakage current monitor; nanotechnology SRAM; on-chip sensors; on-chip timer; substrate noise manager; temperature sensor; Computerized monitoring; Environmental management; Fluctuations; Leakage current; Random access memory; SRAM chips; Temperature sensors; Testing; Uncertainty; Working environment noise;
fLanguage
English
Publisher
ieee
Conference_Titel
VLSI Circuits, 2005. Digest of Technical Papers. 2005 Symposium on
Print_ISBN
4-900784-01-X
Type
conf
DOI
10.1109/VLSIC.2005.1469374
Filename
1469374
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