A 0.95 mW/1.0 Gbps spiral-inductor based wireless chip-interconnect with asynchronous communication scheme

Author

Sasaki, Mamoru ; Iwata, Atsushi

Author_Institution

Graduate Sch., Hiroshima Univ., Japan

fYear

2005

fDate

16-18 June 2005

Firstpage

348

Lastpage

351

Abstract

This paper presents a reduction method of power consumption and an asynchronous communication scheme for spiral-inductor based wireless chip-interconnect. The power reduction is achieved by utilizing positively resonance phenomena between two spiral inductors. Further, employing dynamic circuits and self pre-charging technique realizes an asynchronous communication without any clocking. The methodology was verified and evaluated by measuring a test chip in 0.18μm 6 metal CMOS technology. The performance of 0.95 mW/1.0 Gbps/ch was achieved without any clocking.

Keywords

CMOS integrated circuits; asynchronous circuits; inductors; integrated circuit design; integrated circuit interconnections; low-power electronics; 0.18 micron; 0.95 mW; 1.0 Gbit/s; 3D integrated circuit; CMOS technology; asynchronous communication scheme; clocking; positively resonance phenomena; power consumption; self pre-charging; spiral inductor; wireless chip-interconnect; Asynchronous communication; CMOS technology; Clocks; Damping; Energy consumption; FETs; Inductors; MOS devices; Resonance; Spirals;

fLanguage

English

Publisher

ieee

Conference_Titel

VLSI Circuits, 2005. Digest of Technical Papers. 2005 Symposium on

Print_ISBN

4-900784-01-X

Type

conf

DOI

10.1109/VLSIC.2005.1469402

Filename

1469402