Statistical interpolation of FET data base measurements

Research into valid and compact statistical FET models is described. A statistical interpolation technique that extends the truth model proposed by J. Purviance et al. (1990) is presented. The truth model simply uses samples from a FET measurement database when performing statistical analysis and design of circuits. The statistical interpolation technique presented multiplies the number of points within a statistical database by interpolating among the measurements in a statistically valid manner. It lends itself easily to software implementation and gives results that are better than those obtained using other available simulation models. The statistical interpolation technique has been developed and validated using 179 GaAs FETs.<>