A bandpass A/D converter and its I/Q demodulator for integrated receivers

A bandpass analog-to-digital converter is presented ; it consists of a bandpass ΣΔ modulator followed by a digital I/Q demodulator and decimators. The ΣΔ modulator was fabricated in 0.5-µm CMOS technology with double-poly. Measurements revealed a SNDR = 56 dB (9 ENOB) with a 200 kHz bandwidth and a sampling frequency Fs = 4 MHz (OSR = 10). The power consumption is equal to 19 mW for a 3.0-V supply voltage and the integration surface is about 2 mm², including two reference voltages. The digital part, that is to say the digital I/Q demodulation and the decimation, has been prototyped on 5 FPGAs (FLEX 10K50 and 10K100 from Altera).