A threshold logic full adder based on resonant tunneling transistors

Resonant tunneling transistors and circuit architectures with enhanced computational functionality are promising candidates for future nano-scale integration. In this paper we propose a full adder cell based on multiple terminal linear threshold gates. The threshold gates are composed of monolithically integrated resonant tunneling diodes and heterostructure field effect transistors. Together with a bit-level pipelining scheme this leads to an efficient implementation with a minimal logic depth of two circuit layers.