Design of silicon oxide variable capacitor

Silicon-silicon oxide-metal capacitors have been developed and studied in view of their applications to reactance amplifiers. Desirable characteristics are: 1. Large dc/dv. 2. Symmetrical C-V characteristic at zero bias. 3. Low spreading Rs. 4. Low leakage current. Devices with symmetric characteristics at Zero bias, 1 dc/C dv better than one per volt, good linearity over 50 percent of the capacitance range, and overall capacitance ratios several hundred to one will be described. Important parameters are (1) the quality of the oxide which affects both symmetry and leakage current; (2) the choice of the counter electrode metal, which is responsible for a shift in quiescent bias (alloys can be used for intermediate voltages); (3) the base material itself and oxide thickness which determines minimum and maximum capacitance. Most difficult control to achieve is that of the surface states at the silicon-oxide interface. They are affected by the base material, the condition of oxide growth and the center electrode material. Special techniques, and in particular, oxid doping, have been used and long range stability has been achieved with some treatments. Results of tests in actual circuit, variation of characteristics with frequency, effect of temperature and light, as well as observations on aging will be presented.