DocumentCode
3552113
Title
Optimal aspect ratios of building blocks in VLSI
Author
Wimer, Shmuel ; Koren, Israel ; Cederbaum, Israel
Author_Institution
Dept. of Electr. Eng., Technion, Israel Inst. of Technol., Israel
fYear
1988
fDate
12-15 June 1988
Firstpage
66
Lastpage
71
Abstract
A discussion is presented of the problem of selecting an optimal implementation for each building block so that the area of the final layout is minimised. A polynomial algorithm that solves this problem for slicing floorplans was presented elsewhere, and it has been proved that for general (nonslicing) floorplans the problem is NP-complete. The authors suggest a branch-and-bound algorithm which proves to be very efficient and can handle successfully large general nonslicing floorplans. They show also how the nonslicing and slicing algorithms can be combined to handle very large general floorplans efficiently.<>
Keywords
VLSI; circuit layout CAD; minimisation; VLSI; branch-and-bound algorithm; building block; large general nonslicing floorplans; layout area minimisation; optimal implementation; polynomial algorithm; slicing floorplans; very large general floorplans; Cities and towns; Geometry; Physics computing; Piecewise linear approximation; Piecewise linear techniques; Polynomials; Registers; Very large scale integration;
fLanguage
English
Publisher
ieee
Conference_Titel
Design Automation Conference, 1988. Proceedings., 25th ACM/IEEE
Conference_Location
Anaheim, CA, USA
ISSN
0738-100X
Print_ISBN
0-8186-0864-1
Type
conf
DOI
10.1109/DAC.1988.14736
Filename
14736
Link To Document