A 1 watt, 1 Gc silicon transistor

Planar epitaxial silicon transistors have been made which, when used as oscillators, deliver in excess of one watt at 1 Gc with 30% efficiency. Because of the very high power densities at which such a device must operate, it is of paramount importance that heat be removed efficiently from the active area. The design of these devices takes advantage of the planar structure to distribute the active area to facilitate heat removal. The device geometry consists of a number of individual segments interconnected by a low inductance metal film. Each segment has an emitter area of 1.9 × 10^-5cm². The number of segments connected to form the transistor structure is determined by the desired power and impedance levels. Data will be given on structures consisting of up to eight segments, corresponding to a total emitter area of 3.4 × 10^-4cm². Even for this case of eight segments, the silicon chip is 80 × 10^-4cm². The importance of such parameters as uniformity of current distribution and stripe width upon the operation of these transistor structures will be illustrated and discussed together with the effects of limiting carrier velocity upon the optimum design of the doping profile through the epitaxial film.